Logic minimization and synthesis
6 methods in the atlas attack this one problem. They are rivals: each wins something the others do not.
Phrasings that mean this problem
Exact logic minimizationHeuristic logic minimizationLogic synthesisBoolean function representationSequential optimization
vlsi-eda
- Quine-McCluskeyPrime implicant tabulationstandardvlsi-eda
- Karnaugh mappingVisual adjacency groupingspecialistvlsi-eda
- Espresso minimizerExpand-reduce-irredundant loopstandardvlsi-eda
- Binary decision diagramReduced ordered canonical formcanonvlsi-eda
- And-inverter graph rewritingCut-based local rewritingstandardvlsi-eda
- RetimingRegister movement across logicspecialistvlsi-eda